ARQ-S / ARQ1000S
Synchronous
Simplex ARQ using the 7 bit error correcting ITA 3 alphabet with
the addition of 1 bit for parity-check. Two stations use the same
frequency, working as ISS (transmitting) and IRS (receiving)
stations. This module does not auto-detect the character cycle
rate, you must choose the correct one yourself.
Every odd numbered cycle has all bits inverted. Repetition cycle
timings for block lengths of 3, 4, 5, 6 or 7 characters are as
follows,
Total block time |
Characters |
Tx time |
Rx time |
438 msec |
3x7 bit characters |
219 msec |
219 msec |
583 msec |
4x7 bit characters |
292 msec |
292 msec |
729 msec |
5x7 bit characters |
365 msec |
365 msec |
875 msec |
6x7 bit characters |
438 msec |
438 msec |
1021 msec |
7x7 bit characters |
510 msec |
510 msec |